You can instruct the compiler to generate code for optimal execution on a given microprocessor or architecture family. By selecting appropriate target machine options, you can optimize to suit the broadest possible selection of target processors, a range of processors within a given family of processor architectures, or a specific processor.
The following table lists the optimization options that affect individual aspects of the target machine. Using a predefined optimization level sets default values for these individual options.
| Option | Behavior |
|---|---|
| -q32 | Generates code for a 32-bit (4 byte integer / 4 byte long / 4 byte pointer) addressing model (32-bit execution mode). This is the default setting. |
| -q64 | Generates code for a 64-bit (4 byte integer / 8 byte long / 8 byte pointer) addressing model (64-bit execution mode). |
| -qarch | Selects a family of processor architectures for which instruction code should be generated. This option restricts the instruction set generated to a subset of that for the PowerPC® architecture. The default on all Linux® distributions is -qarch=ppc64grsq. Using -O4 or -O5 sets the default to -qarch=auto. See Getting the most out of target machine options below for more information on this option. |
| -qtune | Biases optimization toward execution on a given microprocessor, without implying anything about the instruction set architecture to use as a target. See Getting the most out of target machine options below for more information on this option. |
| -qcache | Defines a specific cache or memory geometry. The defaults are determined through the setting of -qtune. See Getting the most out of target machine options below for more information on this option. |
For a complete listing of valid hardware-related suboptions and combinations of suboptions, see Acceptable -qarch/-qtune combinations in the -qtune section of the XL C/C++ Compiler Reference and see Specifying Compiler Options for Architecture-Specific, 32- or 64-bit Compilation in the XL C/C++ Compiler Reference.